elekVolpdfScanJPGScanJPGScanJPGScan JPGScanJPGScanJPGScanJPGScan Uploaded by Aleksandar Pavlovic. Copyright: © All Rights Reserved. Download as PDF or read online from Scribd. Flag for. Tue, 20 Nov GMT elektor circuits pdf – Elektor – Circuits. Circuits 1 to 78 – Vol. 1Practical electronic circuits for the home constructor Skip.
|Published (Last):||8 February 2012|
|PDF File Size:||16.93 Mb|
|ePub File Size:||12.46 Mb|
|Price:||Free* [*Free Regsitration Required]|
The decimal point is usually replaced by one of the following abbreviations: A conventional IF transformer is used to determine the frequency, The alignment generator is tuned to the correct frequency by passing the output signal through a ceramic IF filter.
In general, any other member of the same family can be used instead. At the same time the inter- nal oscillator begins feeding pulses to the coun- ter. Automatic mono stereo switch.
Elektor – 301 Circuits
These consist of an exposed wire el- ement wound on a ceramic former, and are pro- elsktor with contact dips that may be fixed any- where along the length of the element, 1 kW electric fire heating elements which have a re- sistance of around 60 Q may also be used.
This design is a contribution towards such a the discussion. The clock signal is provided by ICl.
Each time they reach zero the carry- out pulse of IC5 is fed through N10 to the preset- enable inputs of these three ICs. The circuit uses a second bridge rectifier D The stereo -mono crossover frequency can be in- is The values of R1 and R2 de- pend on the secondary voltage: The flip-flop which has been set may be reset ready for the next question by pushbutton Sr.
When the contacts are released the input is still held high via Rl, so the output remains high. When input Q goes high the circuit begins to oscillate, switching Tl and T2 on and off and producing an alarm signal from the loudspeaker.
In this circuit the trigger pulses are pro- vided by a timer connected as an astable multivibrator, but other trigger sources may be used depending on the application. The negative -going edge of the waveform is independent of the amplitude of the input signal and occurs always at the zero- crossing point. The circuit has only one adjustment, the sensi- tivity control PI.
Elektor – Circuits
To minimise clock noise the outputs from the fi- nal and penultimate stages of the 1C are summed by R7, R8 and P2, However, if the circuit is to be used with the minimum clock frequency then clock noise will still be audible, and the lowpass filter circuit shown in figure 2 should be connec- ted to the output. Via D6 the input of N4 goes high. The circuit will generate a squarewave with a sv 33 2 frequency between 20 Hz and 1 MHz. When constructing the circuit par- ticular care should be taken to ensure that the 0 V rail is of low resistance heavy gauge wire or wide p.
This is due to a de- cision by the BBC to transmit the 19 kHz pilot tone with all programmes, ostensibly to elim- inate annoying clicks that occur when switching 22 1 stereo decoder 6. However, if any signifi- cant current is drawn the output voltage will quickly fall, as shown in figure lb.
Elektor – 301 Circuits.pdf
Photo 3 shows the effect of poor highfrequency response due to in- correct adjustment of the compensation trim- mers in the Y attenuator. The signal is also fed to two limiting amplifiers, which convert the va- riable amplitude sinewave of the input signal in- to a constant amplitude square wave having the same frequency as the input signal – This square- wave is used to clock a binary counter whose div- ision ratio can be set to 2, 4, S etc, so that the output is one, two, three etc.
Normally RI is given the same value as R2. The supply basically consists of an amplifier with a gain of 2, comprising a op-amp and an emitter elejtor, T2, to boost the output current capability. It is then a simple matter to adjust PI until the maximum output voltage is obtained on the meter, where- upon the optimum collector current can be read off from the scale of P 1.
As far as the bridge rectifiers wlektor concerned, these should be adequately rated to withstand the peak transformer voltage and the maximum load current. When the output of N3 goes high the voltage on the positive end of O is about 9 V, so Cl discharges through D2 into C2. Tl in turn 3011 tend to turn off and the supply voltage will fall. The current limit is continuously variable elektoe means of P3. A suggested printed circuit board design and component layout for the cir- cuit of figure 2.
Adjustment procedure The adjustment procedure consists simply of ad- justing the triangle symmetry and sine purity. This will not normally be a problem; however, in cases where the mains frequency is used for synchronisation some modifi- cation may be required. The inputs of NI to N4 are held low via the filaments of the lamps, etc. Should the output voltage of the regulator tend to fall then the lower end elrktor D 5 will fall below 0 V and transistor T3 will draw more current.